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low_power_slow_sram

1Mb | HY628100B

  • Computing Memory
  • Consumer Memory
  • Graphics Memory
  • Mobile Memory
  • NAND Flash
DDR3 SDRAM :[Com.][Mod.] DDR2 SDRAM :[Com.][Mod.] DDR SDRAM :[Com.][Mod.]
DDR2 SDRAM | DDR SDRAM | SDR SDRAM : [Com.] [Mod.]

Technical Data Sheet

Part Number Rev. Updated Date Remark
HY628100B 12 2004-04-26  

Description

The HY628100B is a high speed, low power and 1M bit CMOS Static Random Access Memory organized as 131,072 words by 8bits.
The HY628100B uses high performance CMOS process technology and designed for high speed low power circuit technology.
It is particularly well suited for used in high density low power system application.
This device has a data retention mode that guarantees data to remain valid at a minimum power supply voltage of 2.0V.

< PIN DESCRIPTION >

Pin Name

Pin Function

Pin Name

Pin Function

/CS1

Chip Select 1

CS2

Chip Select 2

/WE

Write Enable

/OE

Output Enable

A0~A16

Address Input

IO1~IO8

Lower Data Input/Output

Vdd

Power(4.5V~5.5V)

Vss

Ground

Features

    • Fully static operation and Tri-state output
    • TTL compatible inputs and outputs
    • Batterybackup(L/LL-part)
      • 2.0V(min) data retention
    • Standard pin configuration
      • 32pin 525mil SOP
      • 32pin 8x20mm2 TSOP-I (Standard)

Ordering Information

Part Number

Voltage
(V)

Speed
(ns)

Operation
Current/Icc

(mA)

Standby
Current(uA)

Temp.(oc)

L

LL

HY628100B

4.5~5.5

50/55/77/85

10

100

20

0~70

HY628100B-E

4.5~5.5

50/55/77/85

10

100

30

-25~85

HY628100B-I

4.5~5.5

50/55/77/85

10

100

30

-40~85

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