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low_power_slow_sram

4Mb | HY628400A

  • Computing Memory
  • Consumer Memory
  • Graphics Memory
  • Mobile Memory
  • NAND Flash
DDR3 SDRAM :[Com.][Mod.] DDR2 SDRAM :[Com.][Mod.] DDR SDRAM :[Com.][Mod.]
DDR2 SDRAM | DDR SDRAM | SDR SDRAM : [Com.] [Mod.]

Technical Data Sheet

Part Number Rev. Updated Date Remark
HY628400A 0.7 2004-04-26  

Description

The HY628400A is a high speed, low power and 4M bit CMOS SRAM organized as 512K words by 8bits.
The HY628400A uses Hyundai's high performance twin tub CMOS process technology and was designed for high-speed and low power circuit technology.
It is particularly well suited for use in high-density and low power system applications.
This device has a data retention mode that guarantees data to remain valid at the minimum power supply voltage of 2.0V.

< PIN DESCRIPTION >

Pin Name

Pin Function

Pin Name

Pin Function

/CS

Chip Select

/OE

Output Enable

/WE

Write Enable

IO1~IO8

Data Input/Output

A0~A18

Address Input

Vss

Ground

Vdd

Power(4.5~5.5V)

Features

    • Fully static operation and Tri-state output
    • TTL compatible inputs and outputs
    • Batterybackup (L/LL-part)
      • 2.0V(min) data retention
    • Standard pin configuration
      • 32pin 525mil SOP
      • 32pin 400mil TSOP-II (Standard and Reversed)

Ordering Information

Part Number

Voltage
(V)

Speed
(ns)

Operation
Current/Icc

(mA)

Standby
Current(uA)

Temp.(oc)

L

LL

HY628400A

4.5~5.5

55/70/85

10

100

30

0~70

HY628400A-E

4.5~5.5

55/70/85

10

100

50

-25~85

HY628400A-I

4.5~5.5

55/70/85

10

100

50

-40~85

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