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low_power_slow_sram

1Mb | HY62U8100B

  • Computing Memory
  • Consumer Memory
  • Graphics Memory
  • Mobile Memory
  • NAND Flash
DDR3 SDRAM :[Com.][Mod.] DDR2 SDRAM :[Com.][Mod.] DDR SDRAM :[Com.][Mod.]
DDR2 SDRAM | DDR SDRAM | SDR SDRAM : [Com.] [Mod.]

Technical Data Sheet

Part Number Rev. Updated Date Remark
HY62U8100B 13 2004-04-26  

Description

The HY62U8100B is a high speed, low power and 1M bit CMOS SRAM organized as 131,072 words by 8bits.
The HY62U8100B uses high performance CMOS process technology and designed for high speed low power circuit technology.
It is particularly well suited for used in high density low power system application.
This device has a data retention mode that guarantees data to remain valid at a minimum power supply voltage of 2.0V.

< PIN DESCRIPTION >

Pin Name

Pin Function

Pin Name

Pin Function

/CS1

Chip Select 1

CS2

Chip Select 2

/WE

Write Enable

/OE

Output Enable

A0~A16

Address Inputs

IO1~IO8

Data Input/Output

Vcc

Power(2.7~3.3V)

Vss

Ground

Features

    • Fully static operation and Tri-state output
    • TTL compatible inputs and outputs
    • Batteryback up (L/LL-part)
      • 2.0V(min) data retention
    • Standard pin configuration
      • 32pin 525mil SOP
      • 32pin 8x20mm2 TSOP-I (Standard)
      • 32pin 8x13.4mm2 sTSOP-I (Standard)

Ordering Information

Part Number

Voltage
(V)

Speed
(ns)

Operation
Current/Icc

(mA)

Standby
Current(uA)

Temp.(oc)

L

LL

HY62U8100B

2.7~3.3

70*/85/100

5

10

0~70

HY62U8100B-E

2.7~3.3

70*/85/100

5

15

-25~85

HY62U8100B-I

2.7~3.3

70*/85/100

5

15

-40~85

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