
| Part Number | Rev. | Updated Date | Remark |
|---|---|---|---|
| HY62V8400A | 0.6 | 2004-04-26 |
The HY62V8400A is a high speed, low power and 4M bit CMOS SRAM organized as 512K words by 8bits.
The HY62V8400A uses hynix¡¯s high performance twin tub CMOS process technology and was designed for high-speed and low power circuit technology.
It is particularly well suited for use in high-density and low power system applications.
This device has a data retention mode that guarantees data to remain valid at the minimum power supply voltage of 2.0V.
< PIN DESCRIPTION >
|
Pin Name |
Pin Function |
Pin Name |
Pin Function |
|
/CS |
Chip Select |
/OE |
Output Enable |
|
/WE |
Write Enable |
IO1~IO8 |
Data Input/Output |
|
A0~A18 |
Address Input |
Vss |
Ground |
|
Vdd |
Power(3.0V~3.6V) |
|
|
|
Part Number |
Voltage |
Speed |
Operation (mA) |
Standby |
Temp.(oc) |
|
|
L |
LL |
|||||
|
HY62V8400A |
3.0~3.6 |
70/85/100 |
5 |
|
20 |
0~70 |
|
HY62V8400A-E |
3.0~3.6 |
70/85/100 |
5 |
|
30 |
-25~85 |
|
HY62V8400A-I |
3.0~3.6 |
70/85/100 |
5 |
|
30 |
-40~85 |